[EFFICIENT HARDWARE + INFRASTRUCTURE DESIGN TRACK]: Striking a Balance Between Memory, Storage and Compute Requirements in Systems for Efficient Performance | Kisaco Research
Session Topics: 
Systems
Hardware
Infrastructure
Sponsor(s): 
Rambus
Speaker(s): 
Moderator

Author:

Steven Woo

Fellow and Distinguished Inventor
Rambus

I was drawn to Rambus to focus on cutting edge computing technologies. Throughout my 15+ year career, I’ve helped invent, create and develop means of driving and extending performance in both hardware and software solutions. At Rambus, we are solving challenges that are completely new to the industry and occur as a response to deployments that are highly sophisticated and advanced.

As an inventor, I find myself approaching a challenge like a room filled with 100,000 pieces of a puzzle where it is my job to figure out how they all go together – without knowing what it is supposed to look like in the end. For me, the job of finishing the puzzle is as enjoyable as the actual process of coming up with a new, innovative solution.

For example, RDRAM®, our first mainstream memory architecture, implemented in hundreds of millions of consumer, computing and networking products from leading electronics companies including Cisco, Dell, Hitachi, HP, Intel, etc. We did a lot of novel things that required inventiveness – we pushed the envelope and created state of the art performance without making actual changes to the infrastructure.

I’m excited about the new opportunities as computing is becoming more and more pervasive in our everyday lives. With a world full of data, my job and my fellow inventors’ job will be to stay curious, maintain an inquisitive approach and create solutions that are technologically superior and that seamlessly intertwine with our daily lives.

After an inspiring work day at Rambus, I enjoy spending time with my family, being outdoors, swimming, and reading.

Education

  • Ph.D., Electrical Engineering, Stanford University
  • M.S. Electrical Engineering, Stanford University
  • Master of Engineering, Harvey Mudd College
  • B.S. Engineering, Harvey Mudd College

Steven Woo

Fellow and Distinguished Inventor
Rambus

I was drawn to Rambus to focus on cutting edge computing technologies. Throughout my 15+ year career, I’ve helped invent, create and develop means of driving and extending performance in both hardware and software solutions. At Rambus, we are solving challenges that are completely new to the industry and occur as a response to deployments that are highly sophisticated and advanced.

As an inventor, I find myself approaching a challenge like a room filled with 100,000 pieces of a puzzle where it is my job to figure out how they all go together – without knowing what it is supposed to look like in the end. For me, the job of finishing the puzzle is as enjoyable as the actual process of coming up with a new, innovative solution.

For example, RDRAM®, our first mainstream memory architecture, implemented in hundreds of millions of consumer, computing and networking products from leading electronics companies including Cisco, Dell, Hitachi, HP, Intel, etc. We did a lot of novel things that required inventiveness – we pushed the envelope and created state of the art performance without making actual changes to the infrastructure.

I’m excited about the new opportunities as computing is becoming more and more pervasive in our everyday lives. With a world full of data, my job and my fellow inventors’ job will be to stay curious, maintain an inquisitive approach and create solutions that are technologically superior and that seamlessly intertwine with our daily lives.

After an inspiring work day at Rambus, I enjoy spending time with my family, being outdoors, swimming, and reading.

Education

  • Ph.D., Electrical Engineering, Stanford University
  • M.S. Electrical Engineering, Stanford University
  • Master of Engineering, Harvey Mudd College
  • B.S. Engineering, Harvey Mudd College

Author:

Manoj Wadekar

AI Systems Technologist
Meta

Manoj Wadekar

AI Systems Technologist
Meta

Author:

Taeksang Song

CVP
Samsung Electronics

Taeksang is a Corporate VP at Samsung Electronics where he is leading a team dedicated to pioneering cutting-edge technologies including CXL memory expander, fabric attached memory solution and processing near memory to meet the evolving demands of next-generation data-centric AI architecture. He has almost 20 years' professional experience in memory and sub-system architecture, interconnect protocols, system-on-chip design and collaborating with CSPs to enable hetegeneous computing infrastructure.  Prior to joining Samsung Electronics, he worked at Rambus Inc., SK hynix and Micron Technology in lead architect roles for the emerging memory controllers and systems. 

Taeksang receives his Ph.D. degree from KAIST, South Korea, in 2006. Dr. Song has authored and co-authored over 20 technical papers and holds over 50 U.S. patents. 

 

 

Taeksang Song

CVP
Samsung Electronics

Taeksang is a Corporate VP at Samsung Electronics where he is leading a team dedicated to pioneering cutting-edge technologies including CXL memory expander, fabric attached memory solution and processing near memory to meet the evolving demands of next-generation data-centric AI architecture. He has almost 20 years' professional experience in memory and sub-system architecture, interconnect protocols, system-on-chip design and collaborating with CSPs to enable hetegeneous computing infrastructure.  Prior to joining Samsung Electronics, he worked at Rambus Inc., SK hynix and Micron Technology in lead architect roles for the emerging memory controllers and systems. 

Taeksang receives his Ph.D. degree from KAIST, South Korea, in 2006. Dr. Song has authored and co-authored over 20 technical papers and holds over 50 U.S. patents. 

 

 

Author:

Markus Flierl

CVP Intel Cloud Services
Intel, Corp

Markus joined Intel in early 2022 to lead Intel Cloud Services which includes Intel Tiber Developer Cloud (ITDC/ cloud.intel.com), Intel Tiber App-Level Optimization (formerly known as Granulate). Intel Tiber Developer Cloud provides a range of cloud services based on Intel latest pre-production and production hardware and software with focus on AI workloads. ITDC hosts large production workloads for companies such as seekr or Prediction Guard. Before joining Intel Markus built out NVIDIA’s GPU cloud infrastructure services leveraging cutting edge NVIDIA and open source technologies. Today it is the foundation for NVIDIA’s GeForce Now cloud gaming service which has become the leader in cloud gaming with over 25 million registered users globally as well as NVIDIA’s DGX cloud and edge computing workloads like NVIDIA Omniverse™. Prior to that Markus led product strategy and product development of private and public cloud infrastructure and storage software at Oracle Corporation and Sun Microsystems.

Markus Flierl

CVP Intel Cloud Services
Intel, Corp

Markus joined Intel in early 2022 to lead Intel Cloud Services which includes Intel Tiber Developer Cloud (ITDC/ cloud.intel.com), Intel Tiber App-Level Optimization (formerly known as Granulate). Intel Tiber Developer Cloud provides a range of cloud services based on Intel latest pre-production and production hardware and software with focus on AI workloads. ITDC hosts large production workloads for companies such as seekr or Prediction Guard. Before joining Intel Markus built out NVIDIA’s GPU cloud infrastructure services leveraging cutting edge NVIDIA and open source technologies. Today it is the foundation for NVIDIA’s GeForce Now cloud gaming service which has become the leader in cloud gaming with over 25 million registered users globally as well as NVIDIA’s DGX cloud and edge computing workloads like NVIDIA Omniverse™. Prior to that Markus led product strategy and product development of private and public cloud infrastructure and storage software at Oracle Corporation and Sun Microsystems.